Subramanian Iyer

Subramanian Iyer serves as the director of the National Advanced Packaging Manufacturing Program (NAPMP). Iyer brings extensive industrial and academic experience and expertise in microelectronics and packaging.

Iyer comes to CHIPS via an Intergovernment Personnel Act (IPA) agreement with the University of California, Los Angeles (UCLA), where he is a distinguished professor and holds the Charles P. Reames Endowed Chair. Under the IPA, Iyer remains an employee of UCLA while on full-time assignment to the CHIPS R&D Office. 

At UCLA, Iyer’s teaching and research interests are in exploring new packaging paradigms and device innovations that may enable high-performance architectures, in-memory analog compute, and medical engineering applications.  

Before joining UCLA in 2015, Iyer served at IBM in a variety of roles, including IBM Fellow and director of packaging. Iyer is credited with development of the first SiGe heterojunction bipolar transistor, embedded dynamic random-access memory (eDRAM), as well as the first commercial interposer and 3D memory products. Iyer is an author on more than 300 peer-reviewed journal publications and has been awarded more than 75 patents. He earned a Ph.D. in electrical engineering from UCLA. 

The CHIPS for America R&D Office is responsible for four integrated programs that will ensure American semiconductor manufacturers remain globally competitive: the National Semiconductor Technology Center (NSTC), the NAPMP, up to three new Manufacturing USA institutes dedicated to semiconductors, and the CHIPS R&D Metrology Program.    

The NAPMP aims to accelerate the development and implementation of assembly, packaging, and test capabilities in the domestic microelectronics ecosystem by identifying leap-ahead technologies that will place U.S. advanced packaging in a globally competitive position.