Anabela Veloso

Anabela Veloso received a Ph.D. from INESC-IST-Lisbon University, Portugal in 2002. Since 2001, she has been working at imec, in Leuven, Belgium, where she is a principal member of technical staff. Currently, her main research interests are in the areas of advanced CMOS device physics, integration, characterization, and technology, with recent focus on the exploration of scaled nanowires/nanosheets based FETs (with lateral or vertical transport), logic with functional backside, buried power rails, nano-TSVs, and overall novel device schemes while also taking into consideration possible new options for transistor engineering and connectivity from the wafer’s front/backside. She has authored or co-authored more than 200 papers published in peer-reviewed international conference proceedings and technical journals, presented 20 invited conference talks, and has been (co-)inventor of more than 23 filed/granted patents. She has also been serving in several conference committees including IEDM, SSDM, ECS Meeting, and the Symposium on VLSI Technology and Circuits.